One-step timestamping of PTP packets has developed to a popular technology in IEEE 1588 aware devices. This hardware-based mechanism allows to disengage a PTP master by reducing the computational load. Especially when using unicast communication mode and high message rates PTP masters may benefit from the additional hardware feature.

Based on the existing IPv4 and IPv6 one-step timestamping solution, Oregano Systems enhanced the circuitry to perform hardware-based one-step timestamping for layer 2 PTP packets as well. Naturally, VLAN operation for Layer 2 timestamping is supported as well.

The new layer 2 one-step timestamping technology is present in the following products:

• syn1588^® PCIe NIC
• syn1588^® VIP
• syn1588^® Clock_M IP Core
• syn1588^® Clock_S IP Core
• syn1588^® Gbit Switch