syn1588® VIP IP Core

 

syn1588® VIP is a highly integrated single-chip IEEE1588 solution. Just connect the syn1588® VIP to the Ethernet and receive highly accurate synchronized time or frequency.

The syn1588® VIP IP core enables the integration of a full IEEE1588 solution into your SOC project. It includes all required hardware and software. The syn1588® VIP may be integrated in both FPGA or ASIC designs. With its unrivalled small memory footprint of approx. 32 Kbytes of ROM and approx. 24 Kbytes of RAM and an ASIC gate count of less than 30 Kgates, Oregano Systems‘ syn1588® VIP is at the leading edge of easy to use, small, technology independet, and yet fully compatible clock synchronization solutions.

We offer a syn1588® VIP evaluation board allowing customers to test drive the syn1588® VIP IP core without any risk.

Data Sheet
syn1588® VIP: Brief Datasheet (PDF-File)
syn1588® VIP Evaluation Board: Datasheet (PDF-File)

More Information
For additional information on our syn1588® products or a detailed quotation please contact us.